| 摘要 |
A soft programmable logic array comprises a plurality of logic ranks each formed of functional elements (12, 14, 16, etc) wherein for each functional element the output can be any logical function of the inputs. Each element has a plurality of latches equivalent to the number of possible output states for holding a predetermined logic indication of the associated output state corresponding to the logic function implemented. A plurality of ranks of flip-flop pass-through devices (40, 42, etc) have inputs connected to receive the outputs of one of the logic ranks and outputs connected (Figs. 1b, 1c) to the inputs of another one of the logic ranks and to the output of the logic array. Each pass-through device may invert a logic condition and pass that condition through without delay or latch a logic condition until released, depending upon a predetermined logic function to be implemented. A control circuit sets all of the functional elements and pass-through devices to perform a predetermined logic function. <IMAGE> |
