发明名称 FREQUENCY MULTIPLIER
摘要 PURPOSE:To obtain a low-cost frequency multiplier which operates with high efficiency and high stability in a high frequency band by utilizing the nonlinearity of a field effect transistor (FET). CONSTITUTION:A basic signal is inputted through a matching circuit MC1 and a signal obtained by reflecting the doubled-wave signal by a filter BRF1 is inputted to a common source FET. The FET outputs a higher harmonic component of the basic signal by its non-linearity. A filter BRF2 which reflects the basic wave signal is provided at a position which is 0.1-0.3lambdag (lambdag: wavelength of basic wave) out of phase with the output terminal (drain), and a basic wave component outputted from the FET is mixed in opposite phase for cancellation. Then, the output of the filter BRF2 is applied to a matching circuit MC2 which matches with the doubled-wave signal to obtain a specific doubled-wave signal. Thus, the low-cost frequency multiplier which operates with high efficiency and high stability in a high frequency band is obtained.
申请公布号 JPS59200504(A) 申请公布日期 1984.11.13
申请号 JP19830073205 申请日期 1983.04.26
申请人 FUJITSU KK 发明人 TAKANO TAKESHI;SHIMA TAKAO
分类号 H03B19/14;(IPC1-7):H03B19/14 主分类号 H03B19/14
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