| 摘要 |
PURPOSE:To prevent a latch-up phenomenon or increase latch-up terminal voltage by introducing an impurity in high concentration to a boundary region of a well. CONSTITUTION:The surface of an N type silicon substrate 1 is etched while using an oxide film 20 as a mask, and boron ions in approximately 1X10<15> are implanted to form a P<+> region 21. A P<-> region is formed on the P<+> region through epitaxial growth, and the oxide film 20 is removed. A CMOS semiconductor device is manufactured according to a forming method for a normal CMOS. The same can also apply to an N well system and a twin well system. |
