发明名称 COMPLEMENTARY TYPE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To obtain the titled device of a large latch-up strength without sacrificing the integration degree by a method wherein at least one of the first and second contact diffused regions is formed by superposition on the source diffused region of an adjacent MISFET with the surface impurity concentration set lower than that of said source diffused region and the diffusion depth deeper. CONSTITUTION:When positive surge noise comes in from an output wiring 14, holes are injected from a p type diffused region 4 to an n type substrate 1, and a part of the holes reaches a p type well 2 and then flows out of a p type diffused region 8. However, the injection of the electrons from an n type diffused region 5 of the impurity concentration much higher than that of the p type well 2 sufficiently reduces more than the case of a conventional structure, for the most part of the n type source diffused region 5. It is the same to the injection of holes from a p type source diffused region 3 on the side of the substrate 1. Therefore, it follows that the gain of a positive feedback loop which causes the phenomenon of latch-up largely decreases, resulting in the improvement of the latch-up strength.
申请公布号 JPS59198749(A) 申请公布日期 1984.11.10
申请号 JP19830074274 申请日期 1983.04.25
申请人 MITSUBISHI DENKI KK 发明人 TOKUDA TAKESHI;ASAI SOTOHISA
分类号 H01L27/08;H01L21/74;H01L27/092;H01L29/08;H01L29/78 主分类号 H01L27/08
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