发明名称 ANALOG MULTIPLIER
摘要 PURPOSE:To obtain analog multiplication output at high speed and high accuracy by converting X output to binary bit signal at reference voltage by a sequential comparison type A/D convertor consisting of a comparator and a D/A convertor and giving the signal to the D/A convertor through a control logical circuit. CONSTITUTION:When the terminal 1 of a change-over switch SW1 is connected to a contact 1 by the output signal of a sequence controlling circuit SC, input X is converted to corresponding binary bit signal by a circuit consisting of a comparator COP and a D/A convertor. This bit signal D is taken out from the output of the sequence controlling circuit SC and sent out to the D/A convertor. Consequently, signal D and input Y are multiplied by the D/A convertor, and the result is given to a sample holding circuit SH, and held until the results of A/D conversion of the next cycle and multiplication of input X and input Y. The held signal is outputted from a terminal OUT as the product of input X and input Y.
申请公布号 JPS59197966(A) 申请公布日期 1984.11.09
申请号 JP19830071234 申请日期 1983.04.22
申请人 YOKOKAWA HOKUSHIN DENKI KK 发明人 OGUMA YOSHIO
分类号 G06G7/16;(IPC1-7):G06G7/16 主分类号 G06G7/16
代理机构 代理人
主权项
地址