| 摘要 |
PURPOSE:To perform independently transmission/reception of a signal between a CPU and a multiplex transmitter without interference apparently with each other by writing and reading the signal between a multiplex transmission circuit and a memory at an idle time being an inoperative time of the CPU. CONSTITUTION:A changeover circuit 60 is switched and controlled by a control signal Ca from the CPU36. Then, when the CPU36 is operated, the circuit 60 connects the CPU36 and a memory 48, thereby performing the transmission and reception of the signal between both. When the CPU36 is inoperative on the other hand, the circuit 60 connects the CPU36 and the memory 48 to transmit and receive the signal. Thus, the transmission/reception of the signal between the CPU36 and the memory 48 and the transmission/reception of the signal between the multiplex transmission circuit 58 and the memory 48 are attained effectively in a short time. |
