| 摘要 |
PURPOSE:To eliminate the need for calculation of replacing inversion without delay by providing the prescribed relation to write and read address series at transmission and receiving side in a serial interleaver replacing the other of data series. CONSTITUTION:An address generator 101 for write generates an address in writing an inputted data at an input terminal 104 to a memory 103, and an address generator 102 for read generates an address of a data read from the memory 103. The write/read to the memory 103 are attained alternately. In replacing the order of the data series at the transmission side and restoring it in the original order at the receiving side, the address generator for write at the transmission side and for read at the receiving side, and the address generator for read at the transmission side and for write at the receiving side generate respectively the identical series and a different series mutually and the order of read/write is inverted at the transmission and receiving side. |
