摘要 |
PURPOSE:To obtain correctly a main and a sub-data signal in any phase locking state of a phase synchronism demodulator by selecting the amount of phase shift of the sub-data signal to pi/2pi radian. CONSTITUTION:An input signal enters an orthogonal demodulator 1, where the signal is converted into two demodulating signals P, Q. These signals are applied to a sub-data reproducing section and a main data reproducing section. The signal is converted into output signals 101-104 having four phase relations at a phase shifter of the sub-data reproducing section. Further, a sub-data signal CH3 is obtained by multipliers 10-12, a low pass filter 13, an identification device 14 and an NOT circuit 21. Output signals 108-111 are obtained from the signals P, Q at the main data reproducing section through analog switches 15, 16, an adder 19, a subtractor 20 and an NOT circuit 23. The signals 110, 111 are obtained when an output of a locking phase discriminating circuit 22 is zero and in-phase to the signals P, Q. Further, the signals 108, 109 are signals delayed by pi/4 radian from the P, Q signals. |