发明名称 VOLTAGE GENERATING CIRCUIT, FLASH MEMORY AND SEMICONDUCTOR DEVICE
摘要 Provided is a voltage generation circuit which suppresses an increase in a circuit area and stabilizes an output voltage. According to the present embodiment, a voltage generation circuit (100A) comprises: a charge pump circuit (20); a resistor voltage-division circuit (120); a comparator (34) which compares a voltage (V_m) output by the resistor voltage-division circuit (120) with a reference voltage (V_(ref)); and a control circuit (36) which controls operation of the charge pump circuit (20) based on a result of the comparison via the comparator (34). The resistor voltage-division circuit (120) comprises resistors (R1, R2, R3, and R4) connected in series between an output node (N_(OUT)) and a ground and generates the voltage (V_m) at a voltage-division node (N_R) in response to an output voltage (V_(OUT)). The resistor voltage-division circuit (120) further comprises a parasitic capacitor (C_p) to capacitively couple the resistors (R1, R2, R3, and R4) to the output node (N_(OUT)).
申请公布号 KR20160096005(A) 申请公布日期 2016.08.12
申请号 KR20150123673 申请日期 2015.09.01
申请人 WINBOND ELECTRONICS CORP. 发明人 TAKESHITA TOSHIAKI
分类号 G11C16/30;G11C5/14;H02M3/07 主分类号 G11C16/30
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