发明名称 Circuit and method for reducing non-linearity in analog output current due to waste current switching
摘要 An integrated circuit digital to analog converter using a R/2R resistor ladder has, in a typical bit stage, a bit current transistor (eg 60-1), and a waste current transistor (eg 61-1) connected as shown, with the collector of the latter connected to a metal ground voltage conductor (41) at a "shared node" also connected to the ladder rung resistor. The waste current transistor switches waste current into the shared node, rather than into a separate waste current ground conductor. This results in substantially less voltage variation across the distributed resistance of the metal ground voltage conductor, and consequently lower non-linearity. Most- significant bits may use binary-weighted constant-current sources, rather than the ladder. <IMAGE>
申请公布号 GB2139441(A) 申请公布日期 1984.11.07
申请号 GB19840002251 申请日期 1984.01.27
申请人 * BURR-BROWN RESEARCH CORPORATION 发明人 ANTHONY D * WANG;DONALD L * BRUMBAUGH
分类号 H03M1/78;H03M1/00;H03M1/06;H03M1/68;H03M1/74;(IPC1-7):H03K13/02 主分类号 H03M1/78
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