| 摘要 |
PURPOSE:To make a device inexpensive and reduce the transmission delay time by updating partially a micro instruction register even at an intermediate point of one micro cycle to reduce the number of bits of the register. CONSTITUTION:At the intermediate point of the execution cycle of a micro instruction, a set clock 32 to a micro instruction register 31 is given again. Then, only contents of the micro instruction register 31 are updated to become contents of a destination address part of a control storage device 2. The execution of the micro instruction is terminated with storage of an operation result into a register group 4, and at this time, a destination address is given as the address of the register group 4.
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