发明名称
摘要 A synchronizing circuit used for both an AM intermediate frequency signal and an FM composite signal. A phase detector, voltage-controlled oscillator, frequency divider and phase shifter are connected in a phase-locked loop. The division factor of the frequency divider is controlled to different values for the AM and FM signals.
申请公布号 JPS6219838(U) 申请公布日期 1987.02.05
申请号 JP19850110414U 申请日期 1985.07.18
申请人 发明人
分类号 H03L7/095;H03D1/22;H03L7/183;H04B1/16;H04B1/30 主分类号 H03L7/095
代理机构 代理人
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