| 摘要 |
A high-density integrated circuit employing insulated gate field effect transistors comprises at least three stacked wiring layers, the lowest layer being formed of polycrystalline silicon and including silicon gates of the transistors, one of the upper layers being formed of doped polycrystalline silicon (211) and used for feeding a power supply to some of the transistors being connected to at least one region (220) in which transistors are formed and making with that region a leaky PN junction, and the other of the upper layers (209, 210) being formed of high conductivity metal. <IMAGE> |
