发明名称 COMPLEMENTARY MOS SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To obtain a semiconductor integrated circuit being able to design at a high density, by constituting so as to enable to overlap each other one source supply on the N-channel side and one source supply on the P-channel side when a logical circuit block is arrayed with being overlapped in a mirror state. CONSTITUTION:Concerning the P-channel side, a potential is supplied to the source region 13 through the contact 6 from the metal 2 for supplying power. At this time, the center of the contact 6 to the source region is placed on the outer frame 17, is connected in series to the channel regions 18, 19 in which polycrystalline silicon 8, 9 constitutes gate electrodes, and is connected to the metal 15 through the contact 7 from the drain region 14. On the P-channel side, a potential is supplied to the source regions 10, 12 through the contacts 3, 5 from the metal 1 for supplying power. At this time, the center of the contact 3 is placed on the outer frame 17 of the logical circuit block. Through the channel regions 20, 21 in which polycrystalline silicon 8, 9 constitutes gate electrodes, the drain region 11 is connected to the metal 15 through the contact 4.
申请公布号 JPS6226853(A) 申请公布日期 1987.02.04
申请号 JP19850166482 申请日期 1985.07.26
申请人 NEC CORP 发明人 KAWAKAMI YASUSHI
分类号 H01L21/82;H01L21/8234;H01L21/8238;H01L27/088;H01L27/092;H01L27/118 主分类号 H01L21/82
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