| 摘要 |
<p>PURPOSE:To switch the designation for an input/output address space by providing an instruction processing progress state memory part to show the progress state of an instruction processing and switching the designation for the input/ output address space with a combination of the output of said memory part and an operation code. CONSTITUTION:A 2-bit counter 5 and a counter decoder 6 which decodes the output of the counter 5 are provided within an arithmetic control part 2. The decoded value (f) of the decoder 6 is supplied to an input/output space designating part 3. In addition, an operation code decoder 7 is provided within the part 2 to decode the operation code (a). The decoded value (e) of the decoder 7 is delivered to the part 3. Here an instruction processing progress state memory part is formed by the counter 5 and the decoder 6. The counter 5 counts up with a basic clock showing the minimum unit of the arithmetic processing. Then the processing is through with an instruction when the counter 5 counts up four times. The operation proceeds to the next instruction processing. Thus the designation is switched for the input/output address space in accordance with the state of the counter 5.</p> |
