| 摘要 |
PURPOSE:To attain the forming of various ringing interval signals having different period and phase and to attain efficient mounting by reading a write content from a prescribed address of a PROM at each period of a counter depending on a set value of a switch. CONSTITUTION:Every time a clock pulse is applied to a clock input terminal CLK, a count output of a counter IC1 is counted up and the content of an address bus AB is increased. When the content of the bus AB is maximized, a CY of the IC1 is set to fetch a data ND set by a switch 2, the IC1 starts counting from the value of the data ND and a periodical count output is transmitted to the bus AB. This becomes an address data of a PROM3, a prescribed address is designated sequentially and the content of the designated address is read sequentially. |
