发明名称 STEREOPHONIC DEMODULATOR
摘要 PURPOSE:To improve the ripple component erasing ratio of stereophonic demodulators by providing a ripple erasing circuit which erases ripple components appearing at output sides of a couple of differential amplifiers which mix switching signals with a stereophonic composite signal. CONSTITUTION:The couple of differential amplifiers 2A and 2B are supplied with switching signals from terminals 4A and 4B respectively, and the stereophonic composite signal when supplied from a signal source 6 is processed by the amplifiers 2A and 2B to output stereophonic signals to terminals 26R and 26L through current inverting circuits 24A and 24B. The amplifier 2B is supplied with a bias voltage from a terminal 12 through transistors (TR) 10 and 56. When a source voltage VCC is lowered, a current inverting circuit generates a ripple, but this ripple component is erased from stereophonic demodulation outputs by connecting the ripple erasing circuit 36 to a bias terminal 12 and subtracting the output of the circuit 36 from outputs of the circuits 24A and 24B.
申请公布号 JPS59190745(A) 申请公布日期 1984.10.29
申请号 JP19830066166 申请日期 1983.04.13
申请人 ROOMU KK 发明人 HIKITA JIYUNICHI;SHIMADA GIICHI
分类号 H03D1/22;H04H40/45;H04H40/72 主分类号 H03D1/22
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