| 摘要 |
PURPOSE:To perform the processing in a high speed by connecting plural sorting modules (SMs) into a ring to operate then in parallel and transmitting sorting data to an adjacent SM from each SM to arrange two data in a prescribed order repeatedly. CONSTITUTION:SMs 1 having the same constitution each of which consists of two registers 2 and 3 and one comparator 6 are connected into a ring by bi- directional input/output lines 8 and 10 and are operated simultaneously in parallel by a clock, not shown in the figure. In each SM, data are inputted from signal lines 9 and 11 by a signal LOAD and are stored in registers 2 and 3. Data in the register 2 is moved to the register 3 in each SM and data in the register 3 is moved to the register 2 in the adjacent SM by an R shift signal, and data are sorted, and larger data is moved to the right. Next, data are shifted to the left, and data are sorted. Only with respect to the SM1, a signal EN is set to ''1'' to inhibit the exchange after right shift processing. This operation is repeated to arrange data clockwise (counterclockwise) into a ring in the ascending order with the SM1 as the smallest data. Thus, data are sorted in a high speed with a small number of operations. |
