发明名称 SCAN BUS CONTROLLING DEVICE
摘要 PURPOSE:To reduce the quantity of hardware of a scan bus controlling device and the overhead of time by setting the word constitution of a scan data buffer means so that one parity bit is added to plural data bits. CONSTITUTION:A logical device 1 contains a scan bus 11. A scan bus controlling device 2 consists of a scan data buffer means 21 which is constituted by adding eight data bits and one parity bit, address counter means 22, holding register means 23, temporarily holding register means 27, and scan controlling means. Access from a maintenance diagnostic device 3 to the scan data buffer 21 is performed in the unit of word. Therefore, the quantity of hardware and overhead of time of the scan bus controlling device 2 can be reduced at the same time.
申请公布号 JPS59188756(A) 申请公布日期 1984.10.26
申请号 JP19830062774 申请日期 1983.04.08
申请人 NIPPON DENKI KK 发明人 MORIYAMA SHIYUUKICHI
分类号 G06F11/22;G06F11/267 主分类号 G06F11/22
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