| 摘要 |
PURPOSE:To reduce the width of separation regions improving integration of semiconductor device by a method wherein deep grooves for separating element are formed encircling element forming region on the surface of semiconductor substrate while the sidewalls and the bottom of the grooves located below the element forming region are covered with channel stopper regions and the same inductive type material as the substrate is buried in the grooves. CONSTITUTION:Multiple grooves for element are etched on a P type Si substrate 25 while the sidewalls and the bottom located below element forming regions are covered with P<+> type channel stopper layers 19. Next P type Si is buried in the grooves making upper half of the separation regions 24 directly contact with the element forming regions while lower half abut against the channel stopper layers 19. Later, gate electrodes 27 are mounted on the surface layer of the substrate 25 held by the regions 24 through the intermediary of gate insulating films 26 while N<+> type source regions 28 and drain regions 29 are diffusion- formed utilizing the gate electrodes 27 as masks. Through these procedures, the width of the regions 24 is reduced down to 0.1-0.3mum to form multiple transistors Q1, Q2 etc. on both sides of said separation regions 24. |
