发明名称 |
Circuit arrangement for demodulating a frequency-modulated signal |
摘要 |
To demodulate a frequency-modulated signal in digital representation, the successive digital values are supplied to a multiplier directly via one input and via a delay section via the other input. The product supplied by the multiplier contains a signal component with twice the frequency of the frequency-modulated signal supplied, which is filtered out by a low-pass filter. Furthermore, a signal component exists which contains the instantaneous frequency of the frequency-modulated signal. An essentially linear demodulation is obtained if the delay time of the delay section 4 corresponds to one quarter of the mean period of the input signal. The low-pass filter is suitably formed from a shift register, a number of multipliers which can be implemented by means of adders, and a summing circuit, as digital transversal filter. <IMAGE>
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申请公布号 |
DE3314918(A1) |
申请公布日期 |
1984.10.25 |
申请号 |
DE19833314918 |
申请日期 |
1983.04.25 |
申请人 |
PHILIPS PATENTVERWALTUNG GMBH |
发明人 |
DEMMER,WALTER,ING.;RABELER,THORWALD,ING. |
分类号 |
H03D3/02;(IPC1-7):H03D3/00;H04L27/14 |
主分类号 |
H03D3/02 |
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