发明名称 MEMORY ACCESS SYSTEM
摘要 PURPOSE:To eliminate the hold time of a CPU for reading an ROM storing a dot pattern by reading the content of the ROM via a buffer read in advance. CONSTITUTION:When a designation code such as 1 character or the like from the CPU 10 is written in a latch circuit 11, an advanced read/write counter 12 is started. A count value of the counter 12 is selected by a selector 16 as an address, the ROM 14 storing the dot pattern is accessed and the information read without holding the CPU 10 is stored in a buffer 13. When the reading is designated from the CPU 10, an output of te countner 12 and an address from the CPU 10 are compared and when the data storage of the buffer 13 is confirmed, an output of the ROM 14 is brought into a high impedance by a timing control circuit 15 responding to a comparator circuit 17 and also the buffer 13 is accessed via a selecting circuit 16. Through the constitution above, the hold time for reading the ROM storing the dot pattern is eliminated and the utilizing efficiency of the CPU is improved.
申请公布号 JPS59186186(A) 申请公布日期 1984.10.22
申请号 JP19830059355 申请日期 1983.04.06
申请人 OKI DENKI KOGYO KK 发明人 INOUE MITSUYOSHI;HORI KOUSEI
分类号 G06F12/08 主分类号 G06F12/08
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