发明名称 |
AND GATE DRIVE CIRCUIT |
摘要 |
A "natural" threshold device is serially connected between the gate of an output depletion mode FET device and the input node to an FET device so as to provide current flow from the input node to the gate of the FET device as the input waveform begins to rise, and yet to provide sufficient resistance in the gate circuit of the depletion mode device so as to prevent backward flow of current from the gate as the potential of the output node rises. This increases the conductivity of the output load device, thereby providing a faster rise time for the output waveform. |
申请公布号 |
JPS59185429(A) |
申请公布日期 |
1984.10.22 |
申请号 |
JP19830223388 |
申请日期 |
1983.11.29 |
申请人 |
INTERN BUSINESS MACHINES CORP |
发明人 |
DEEBITSUDO HENRII BOIRU;DANIERU JIYON KOOBA |
分类号 |
H03K5/02;H03K17/06;H03K19/017;H03K19/094;H03K19/0944;H03K19/20 |
主分类号 |
H03K5/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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