| 摘要 |
PURPOSE:To attain a rational interruption request processing sequence by providing a flag and a variable task. CONSTITUTION:A microprocessor MPU receives an interruption request IRQ. If an interruption mask bit within a condition code register is not set when the request is detected, a vector address designated at that time point sets a flag F to a program counter to read the flag. If the contents of the flag are ''0'', a retrieval sequence of a fixed task is executed. While the retrieval sequence of a fixed task is executed if the contents of the flag are equal to ''1''. For this variable task, a vector address designated within a main routine is applied and can be optionally set within the main routine. The vector addresses are limited to the quantity equivalent to the limited interruption source.
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