| 摘要 |
PURPOSE:To obtain a digital signal having a dynamic range being symmetric in positive and negative levels by providing a means for correcting a digital code value at prescribed positive and negative levels to be symmetrical in an analog- digital converting circuit. CONSTITUTION:An analog signal inputted from terminals R, T is converted into an unbalanced voltage at a converter 3, inputted to a voltage comparator 6 and an amplifier 7 via a filter 4 and an amplifier 5 and compared with a voltage at an overload point by the comparator 6. The analog signal is converted into a digital signal in a sampling frequency of 80Hz at an A/D converting circuit 8 by using a 8kHz SYN signal from a clock generating section B. When an input voltage V0 does not exceed a comparison voltage VS, an output CPM of the comparator 6 is logical 1, FFs 28, 29 go both to 0, the converting data is read by a processor 40 as it is, and when V0>VS, the output CPM goes to 0, the FFs 28, 29 go both to 1, 02H of the converting data is converted into 00H and read in the processor 40. |
