| 摘要 |
PURPOSE:To obtain a waveform proportional to an analog input voltage from an output terminal of an FF by correcting a difference of operating delay time at leading and trailing of the FF and an inverter so as to be zero. CONSTITUTION:In functioning a pull-up and down circuit 10 as pull-up by connecting the circuit 10 to a Q' terminal of the FFX1, a series circuit comprising resistors R5, R6 and a variable resistor VR1 is inserted between the Q' and a reference voltage VREF and an output V0 is obtained from a connecting part between the resistor R5 and R6. The voltage V0 at the connecting point between the resistors R5 and R6 is pulled up by VUP from 0V. Then, the operation delay time changed from a low potential to a high potential is made equal to the operating delay time changing from the high potential to the low potential. As a result, when the analog input voltage is, for example, a voltage VREF/2, the periods at the high potential and the low potential inputted from the FFX1 to an AND gate AG are take respectively as 50% and 50%. |
