发明名称 VARIABLE SYNCHRONIZATION GUARD CIRCUIT
摘要 PURPOSE:To stabilize the operation of a circuit by changing the width of a guard signal based on a synchronization input pulse existing in a guard signal period and at the outside of the guard signal period so as to locate a synchronization pulse near the center of the guard signal. CONSTITUTION:A positive synchronization pulse signal 8 is inputted to the terminal of a AND circuit 9 in the varible synchronization guard circuit and the guard signal having narrow width from a guard signal generator 14 is applied to the other terminal after being selected by a switching circuit 15. A negative synchronizing pulse 16 is outputted to an output of the circuit 9 in the period of this guard signal so as to be inputted to a synchronization pull-in circuit and a counter 11 counts the pulse 16. When this count value reaches a prescribed value, an L level output signal 18 is outputted from an RF FF13. This signal 18 operates the circuit 15 so as to input the guard signal having broad width to the circuit 9 and a detecting circuit 10 detecting the synchronization input pulse signal. A pulse signal 17 from this circuit 10 is counted by a counter 12 and when its count value reaches a prescribed value, the FF13 is triggered so as to change the width of the guard signal.
申请公布号 JPS59182672(A) 申请公布日期 1984.10.17
申请号 JP19830056624 申请日期 1983.03.31
申请人 FUJITSU KK 发明人 HIRAOKA MAKOTO;MATSUDA KIICHI;NISHIZAWA YOSHIJI;OOUCHI NOBUAKI
分类号 H04N5/08;H04N5/10 主分类号 H04N5/08
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