| 摘要 |
PURPOSE:To eliminate the need for direct bit discrimination by providing a shift register setting the amount of shift corresponding to the content of low-order 5- bit of a register and suppressing zero bit only when the amount of shift is 0 so as to continue the shift. CONSTITUTION:When an overlay pattern is read in an input buffer 11 in the zero bit suppressing processing of pattern data, preceding 4-bytes of the pattern data are loaded to a register R1. The data is shifted sequentially from the register R1 to a register R0 by referencing a shift table 12 with the amount of shift corresponding to the content of the low-order 5-bit of the register R0. When the data where 32-bits are processed already is shifted to the register R0, the data in 32-bits is outputted to an output pattern data storage section as an output pattern data. Further, the 4-byte next to the input pattern data is loaded.
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