发明名称 PROGRAMMABLE DELAY CIRCUIT
摘要 A programmable delay circuit comprises input and output multiplexers, a delay device provided between the multiplexers, and a negative feedback path. When the input multiplexer selects an input logic signal, the delay time is controlled by the output multiplexer. When the input multiplexer selects the feedback path, the delay circuit acts as a ring oscillator for generating a square-wave signal whose period is twice the selected delay time. Additional delay devices and multiplexers may be provided between the input and output multiplexers.
申请公布号 JPS59181819(A) 申请公布日期 1984.10.16
申请号 JP19840055940 申请日期 1984.03.23
申请人 TEKTRONIX INC 发明人 RONARUDO MAAKU JIYAKUSON
分类号 H03K3/03;H03K5/00;H03K5/13;H03K5/14 主分类号 H03K3/03
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