发明名称 DIGITAL SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To reduce signal distortion generated by the variation of a pulse width in case of receiving a digital signal by connecting two comparators having the almost same switching speed so as to execute an inverting operation each other. CONSTITUTION:A digital signal from a line 11 is applied to comparators 13, 14 after its level is adjusted by a pre-amplifier 12. A signal for determining a discriminating level Vth is applied to the comparators 13, 14 from a discriminating level setting circuit 15. The comparators 13, 14 have the same switching speed, and have such a relation as a logical state of an output is inverted each other. That is to say, a non-inversion input and an inversion input of the comparator 13 are connected to an inversion input and a non-inversion input of the other comparator 14, respectively. Outputs from the comparators 13, 14 are provided to a flip-flop 16. The flip-flop 16 consists of two NAND gates 17, 18. The output from the comparator 13 is provided to the NAND gate 17 as a reset input S through a line 19.
申请公布号 JPS59181758(A) 申请公布日期 1984.10.16
申请号 JP19830043878 申请日期 1983.03.15
申请人 MATSUSHITA DENKO KK 发明人 YAMASHITA KOUJI;FUJII YASUHIRO;OKAMOTO KUNINORI
分类号 H04L25/03;H03K5/01;H04L25/06 主分类号 H04L25/03
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