| 摘要 |
PURPOSE:To prevent a parasitic MOD transistor from being formed on an element side face by forming a conductor pattern connected to a source region forming portion of an element through a notch around an SiO2 film of a peripheral wall of the element. CONSTITUTION:An MOS/SOS is formed with an element 13 having source, drain regions 21, 22 on a sapphire substrate 11, a gate electrode 20 is formed through a gate insulating film 19 on the element 13, and a conductor pattern 17 connected to the source region 21 partly through a notch is formed around the film 14 of the peripheral wall of the element 13. Thus, when the potential of the conductor pattern 17 is set to the same potential as the region 21, an electric field applied to the side of the corresponding gate electrode 20 along the channel longitudinal direction of the element 13 becomes 0 or negative, and since the side becoems lower than the VTH when the voltage is applied to the electrode 20, an inversion is prevented, and the generation of a parasitic MOS transistor on the side of the corresponding electrode 20 along the channel longitudinal directionof the element 13 can be prevented. |
