发明名称 ELECTROSTATIC BREAKDOWN PROTECTING CIRCUIT
摘要 PURPOSE:To prevent a signal input stage of a bipolar type integrated circuit from electrostatic breakdown without dropping breakdown strength, by connecting the collector of a transistor and the emitter to an input terminal and an earth, respectively, and connecting a resistance of a specified value between the bas and the emitter. CONSTITUTION:An input clamp diode D becomes on when a negative voltage is applied to an input termianl, and prevents a fact that an abnormal negative voltage is applied to an input stage of an integrated circuit. When a positive voltage of an input IN rises excessively, breakdown is generated in a p-n junction between the collector and the base of an npn type TR Q, a part of a current flows to an earth through a resistance R, and the remaining current flows between the base and the emitter. By ths current, the TR Q is turned on, and in that case, a current flowing between the collector and the emitter in hFE times a current flowing between the collector and the base, therefore, by setting the hFE large, an abnormal current by overvoltage is by passed to an earth, and to say nothing of the collector - the base of the TR Q, electrostatic breakdown of the diode D, etc. is prevented. A value of the resistance R is related to input breakdown strength and electrostatic breakdown voltage, and set to 3-10KOMICRON.
申请公布号 JPS59181722(A) 申请公布日期 1984.10.16
申请号 JP19830054385 申请日期 1983.03.30
申请人 FUJITSU KK 发明人 ENOMOTO HIROSHI;YASUDA YASUSHI;TAWARA AKINORI
分类号 H03K19/082;H03K17/60;H03K19/003 主分类号 H03K19/082
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