发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To unnecessitate a wide space by facilitating electrode lead-out by realizing the reduction of resistance and the shortening of the element region in the electrode lead-out of a buried diffused layer by a method wherein a window is bored in a film formed at the bottom edge of a projection on a semiconductor substrate, and then a metallic wiring layer directly contacting the substrate via this window is formed on the side surface of the projection. CONSTITUTION:A mask is formed on the element forming region on the Si substrate 21 by means of Si dioxide film 22, and next, the projection 23 is formed by anisotropic etching. Thereafter, an Si dioxide thin film 24 is grown by pressure reduction CVD method, and, when said film is etched with hydrofluoric acid, windows 25 are selectively formed at the bottom edge. Then, an Al film 26 is grown by CVD method. The CVD method enables to grow the Al film 26 of the same thickness as on the other surface also on the side surface of the stepwise difference form. When said film 26 is anisotropically etched by ion milling, Al films on the upper surface of the projection and the surface of the substrate are etched, and accordingly an Al film 26a remains on the side surface of the projection. Thus, the Al metallic wiring layer is formed on the side surface of the projection region wherein the element is formed.
申请公布号 JPS59181665(A) 申请公布日期 1984.10.16
申请号 JP19830055852 申请日期 1983.03.31
申请人 FUJITSU KK 发明人 WATABE KIYOSHI
分类号 H01L29/73;H01L21/28;H01L21/331;H01L29/72 主分类号 H01L29/73
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