发明名称 PRIORITY DECIDING CIRCUIT
摘要 PURPOSE:To obtain a priority deciding circuit constituted easily to 2<n> sets of inputs without requiring large area in case of circuit integration by forming a 2-input priority decision circuit as a unit circuit and arranging the unit circuits in the form of two-branched tree. CONSTITUTION:Suppose that a permissible input signal PI goes to 1 only when a request output signal RO is logical 1, a permissible output signal PO1 to a request input signal RI1 goes to 1 only when a request input signal RI2 is not logical 0, a permission output signal PO2 to the request input signal RI2 goes to 1 when the request input signal RI2 is logical 1 and the circuit acts like a 2- input priority decision circuit 10. The priority decision circuit is constituted by arranging the unit circuits 20, 30 and 40 in the form of two-branched tree depending on the number of the request input signals. Since it is not necessary to provide separately a coded output generating circuit and a permissible signal generating circuit in this way, the circuit is realized by a small area in case of circuit integration.
申请公布号 JPS59181830(A) 申请公布日期 1984.10.16
申请号 JP19830055550 申请日期 1983.03.31
申请人 TOSHIBA KK 发明人 TAMARU KIICHIROU
分类号 H03K19/20;H03K5/26 主分类号 H03K19/20
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