发明名称 DELAY TIME MEASURING DEVICE OF IC TESTER
摘要 PURPOSE:To measure the large delay time of an IC tester by controlling a counter which counts a master clock when a mode waveform is inputted and when an output responding to the mode waveform is outputted. CONSTITUTION:The mode waveform is outputted from a pattern memory 1 by a pattern processor 2 and stored in a pattern output buffer 3. A pattern from this buffer 3 is inputted to an IC6 to be measured through a shaping circuit 4, etc., and inputted to a multiplexer 9 to which the master clock C is impressed, so that the counter 11 starts counting the clock C at the point of time when the mode waveform is inputted. The counter 11 is controlled through a multiplexer 10 impressed with a decision output from a comparing circuit 8 corresponding to the output of the IC6 and the expected value of the buffer 3 and this counting is carried on until the IC6 generates an output corresponding to the mode waveform. Then, the delay time of the IC tester which exceeds the capacity of a fail analyzing memory is measured by the counted value of the counter 11 with high precision.
申请公布号 JPS59180381(A) 申请公布日期 1984.10.13
申请号 JP19830054212 申请日期 1983.03.30
申请人 FUJITSU KK 发明人 HAYASHI TOSHINARI
分类号 G01R31/28;G01R31/319 主分类号 G01R31/28
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