| 摘要 |
PURPOSE:To check a fault on a data bus and the content of an ROM of a CPU board by checking the condition of the ROM by utilizing the feature of the hardware of the CPU. CONSTITUTION:Simultaneously with the turning on of an operation switch SW for increment, a one-shot multivibrator M1 is triggered through an inverter IN and a pulse of a fixed time width is outputted from the Q-output of the M1. This pulse signal is inputted into the J1 terminal of a JKFF1 which is the 1st signal generating means. The Q1-output of the JKFF1 becomes the READY signal of a CPU and, at the same time, is inputted into the J2 terminal of a JKFF2. The Q2' output of the JKFF2 triggers another one-shot multivibrator M2 and the Q-output of the M2 is inputted into the CK3 terminal of a JKFF3 which is the 3rd signal generating means as the clock of the JKFF3. The JKFF2 connects its CK2 terminal with the ALE terminal of the CPU and uses the ALE signal as its clock. The JKFF2 forms the 2nd signal generating means with the one-shot multivibrator M2. |
