| 摘要 |
PURPOSE:To improve the parallel processing rate of the titled device, by analyzing an instruction string of plural parallel arithmetic, and determining the allocating unit, and installing a processing section which performs the selection, using order, securement, and release of registers to avoid overlap of the registers. CONSTITUTION:The allocating unit of a program read out from an instruction string storing section 1 is successively determined at an instruction string analyzing section 3 and an initializing section 4 calculates the number of registers to be used in the determined allocating unit and selects registers to be used. At this time, the using condition of registers in the vicinity of the boundary of the previous allocating unit is detected from a register stack 7 and the allocation is made so that the detected registers are not used for calculation of initial stages. Then an allocation processing section 5 extracts the Nos. of registers to be used from using register No. stack 6 based on a register selecting order and successively stores them in the register stack 7. The calculation is executed in accordance with the register Nos. stored in the register stack 7 and the executed registers are released.
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