ACCUMULATION PROCESSING CIRCUIT OF N CLOCKS

摘要

PURPOSE:To extract the accumulated result of continuous N clocks in each clock by forming calculating devision defining part extracting a value delayed by (N+1) clocks from a value inputted to a delay circuit. CONSTITUTION:A separative value obtained by sampling a received signal is inputted to a multiplier 4 or 5 to be multiplied by sin2pif0 in the circuit 4 or by cos2pif0 in the circuit 5. The output from the circuit 4 or 5 is added to the output of a delay cirlcuit 8 or 9 by an adder 6 or 7 and the added value is inputted to the circuit 8 or 9. The output of the circuit 6 or 7 is inputted to an (N+1) clock delay circuit 13 or 14 and the output of the circuit 13 or 14 is subtracted from the output of the circuit 8 or 9 by a subtractor 15 or 16 and the subtracted output is supplied to the circuit 6 or 7. The output of the circuit 15 or 16 is supplied to a square circuit 10 or 11 and a required processing result is obtained from the added in each clock.