| 摘要 |
PURPOSE:To accurately check an inspection apparatus within a short period of time by providing a fault inspection pattern consisting of a program fault having no normal pattern at the periphery, a pattern consisting of line and space orthogonally crossing at the chip center and a negative pattern. CONSTITUTION:A pattern 1 is a program fault in a large space having no normal pattern in the periphery, a pattern 2 is composed of the fine line and space orthogonally crossing at the chip center and a pattern 3 is a fine negative pattern forming the normal pattern together with the pattern 2. Here, a chip size is matching with an inspection apparatus and accurate focusing can be set with the lattice shaped pattern 2 at the chip center. Those where the chip having such program fault 1 and the chip not having such fault are arranged adequately are inspected by the inspection apparatus. Thereby, accurate fault inspection check can be executed and simultaneously the number of artificial faults generated in a fine pattern can be checked. |
