发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To effectively inhibit the variation of voltage of a power source line by a method wherein power source line stabilizing circuit using a bi-polar transistor is provided on a semiconductor substrate which is integrally forming a CMOS circuit separately from the CMOS circuit. CONSTITUTION:The CMOS circuit is constructed by forming a P-well region 12 on the N type Si substrate 11 and provided with an output buffer 13, a VDD line 14, a GND line 15, the output terminal 16 of the buffer 13, etc. Next, another P type well region 17 is formed in the substrate, and, with said region as the base, an N<+> type emitter layer 18 is provided therein, thus constituting the N-P- N bi-polar transistor 19 as the substrate as the collector. This transistor 19 is interposed between the line 14 and the VDD terminal 20 connected thereto, and a line 15 is directly connected to the GND terminal 21. On the other hand, the region 17 the base of the transistor 19 is made as one electrode, and an opposed electrode 23 is provided thereon via insulation film 22, resulting in the construction of a capacitor 24, which electrode 23 is then connected to the line 15. Besides, a resistance element 25 is interposed between the collector and base of the transistor 19.
申请公布号 JPS59178763(A) 申请公布日期 1984.10.11
申请号 JP19830052915 申请日期 1983.03.29
申请人 TOSHIBA KK 发明人 TAGO HARUYUKI
分类号 H01L21/822;H01L21/8238;H01L27/04;H01L27/06;H01L27/092;H01L29/78 主分类号 H01L21/822
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