| 摘要 |
PURPOSE:To enable detection of error simultaneously with access when error occurs there irrespective of a part or whole of data by unifying error detection output line. CONSTITUTION:When a register stack is in a word access mode, an inversion byte line 12 is in on state. Under this condition, word address is given to a decoder 5 to access word s. By this, a high level signal is sent out to the word address s line. Accordingly, a signal is outputted from an AND gate 11 and passes through an OR gate 10 to access a register through a line 13. If the word s is word 1, the register is accessed, and the output is given to a corresponding error detecting circuit 2, and presence of error is checked for each byte. |
