| 摘要 |
PURPOSE:To facilitate controlling and perform aggregate retrieval of vector mask data of both systems surely even when fault occurred in each operation section by simplifying operation stage of plural pipeline operators that constitute a basic processing system and an extension processing system into one. CONSTITUTION:Data read out in the basic processing system 1 are set to an N- phase clock register 10 through registers 4, 5 and further set to an L-phase clock register 11 and synchronized with vector mask data read out from RAM 3 of the extension processing system 2 and transferred through registers 4, 5. Vector mask data for one bank of two systems are set to a register 12 by reference clock of N-phase and sent to operation circuits 6, 7 by a gate signal G 0. The data are operated during next period and the result is set to a register 8, and added to data of next one bank through an adder 7 by a gate signal G 2. |
