发明名称 INSTRUCTION RETRY SYSTEM
摘要 PURPOSE:To enable removal of causes of system down by executing retry of instruction that caused an error operating a retry controlling circuit in response to output of an instruction error detecting device and an instruction completion detecting device. CONSTITUTION:Suppose that an error occurred in A state of an instruction n during processing of pipeline of an instruction. This error is detected by a detecting circuit 2 and reported to a gate G2, and operation of the gate is stopped to stay in the state A. Each state of preceding instructions n-2, n-1 is executed, and completion of execution of instruction n-1, i.e. completion of W state is detected by a detecting circuit 4. When this detection signal is reported to a retry controlling circuit 3, the retry controlling circuit 3 executes retry of instruction n response to the signal and a signal sent from the error detecting circuit 2.
申请公布号 JPS59178547(A) 申请公布日期 1984.10.09
申请号 JP19830054179 申请日期 1983.03.30
申请人 FUJITSU KK 发明人 KOIKE AKISUMI
分类号 G06F9/38;G06F11/14 主分类号 G06F9/38
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