| 摘要 |
PURPOSE:To enhance the data processing efficiency by providing a DMA private data line, through which DMA data is inputted directly from the external to an RAM, to execute the DMA system without stopping the internal operation. CONSTITUTION:When DMA is not generated, an RAM11 is accessed through an ROM16, an instrution register 15, and the first selector 12, and a program is executed. If a DMA request signal REQ is inputted from the external to a DMA control circuit 13 at this time, the presence or the absence of an RAM read/ write signal RW is confirmed to confirm whether a processor 1 accesses the RAM then. When the processor 1 terminates the access, the DMA control circuit 13 sends a stop signal STP to stop an internal program instruction and outputs a DMA permission signal GRT. A DMA address ADD is inputted from the external to the first selector 12 by the signal GRT and is inputted to the RAM11, and data is stored in a pertinent address.
|
