发明名称 |
PICTURE ARITHMETIC PROCESSING METHOD |
摘要 |
PURPOSE:To attain the pipeline processing which can be reconstructed by connecting plural arithmetic modules to a common data bus line and applying the bus cycle with time division, and allotting the result to each arithmetic module. CONSTITUTION:The picture data is stored in a disk memory 1, and a host computer 2 actuates each of basic arithmetic modules 41, 42... by a program for overall use of a picture processor 3. Each of these arithmetic modules has an independent picture processing function and is connected to a common bus line 6. The data and instructions are transferred from the computer 2, and an interruption is applied to a microcomputer 7. The input/output timing of each arithmetic module (e.g., modules 41-44) is set to perform the pipeline processing. |
申请公布号 |
JPS59176838(A) |
申请公布日期 |
1984.10.06 |
申请号 |
JP19830050470 |
申请日期 |
1983.03.28 |
申请人 |
DAINIHON SCREEN SEIZOU KK |
发明人 |
YAMADA MITSUHIKO;NISHIDA TSUKASA;INOUE TOSHIBUMI;FUJII TOKUZOU;KURUSU HIROSHI;KOBAYASHI JIYUNROU;NAKAO SEIICHI |
分类号 |
G06F9/38;G06F7/00;G06F13/36;G06F15/16;G06F15/177;G06F15/80;G06T1/20 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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