发明名称 CHANNEL PULSE GENERATING CIRCUIT
摘要 PURPOSE:To obtain a pulse generating circuit which generates channel pulses in an optional system by switching the operation of one channel pulse generating circuit. CONSTITUTION:A clock pulse A is frequency-divided by a frequency dividing circuit 101 to apply a start signal B and a frame position signal D to the channel pulse generating circuit 203 while applying a shift clock C to a selecting circuit 202 together with clock signals G and H. Then, the switching between concentration arrangement and distribution arrangement for signals of 24 channels is carried out by applying a clock signal E for six-bit shifting operation and a clock signal F for four-bit shifting operation selectively to the channel pulse generating circuit 203 by the switching operation of the selecting circuit 202, so the size of hardware is reduced considerably.
申请公布号 JPS59175215(A) 申请公布日期 1984.10.04
申请号 JP19830049017 申请日期 1983.03.25
申请人 NIPPON DENKI KK 发明人 USAMI MASAHIKO
分类号 H04J3/04;H03K5/15;H03K5/156 主分类号 H04J3/04
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