| 摘要 |
An analog/digital converter is proposed which operates by the parallel method. To reduce expenditure on components, the reference voltages are each passed to the comparators via adders. The adders allow the reference voltage of a comparator to be varied as a function of the state of other higher-value comparators. This means that very few comparators are necessary and that, with a suitable choice of reference voltages, decoders can be omitted. <IMAGE> |
