| 摘要 |
PURPOSE:To perform the test of all memory cells in a short time by using a logical gate circuit which can give a simultaneous external monitor to the output of plural preamplifiers. CONSTITUTION:In a read mode the data on the selected cell of memory cell blocks 6-9 are delivered to data bus line pairs DB1-DB4 via preamplifiers 10- 13. The output of the line pairs are successively selected by a block selector 14, and only the signal of a pair of bus lines is delivered to a reading buffer 15. At the same time, each data is supplied to a test buffer 17. Then an electrode pad 25 is set at an ''L'' when the input signal of a gate terminal 27-30 is set at an ''H''; while an electrode pad 37 is set at the ''H'' when the input signal of gate terminal 38-41 is set at the ''L''. As a result, the normal memory can be confirmed. |
