Apparatus permitting memory access timesharing by a plurality of users.

摘要

This device comprises an asynchronous memory access control and permits the distribution of the access to a RAM memory (14) among a plurality of users (U1, U2, U3), the access being effected in an asynchronous manner. Certain users (U2, for example) can access the memory at adjacent addresses by means of a single row precharge cycle, the column access cycles (CAS) being successively effected during a single row (RAS) access cycle. One can thus considerably reduce the access time of the memory (14) when a large quantity of data must be read in the memory or written into it. Application to teletext terminals where the users of the memory can be the CPU, the video processor, and a teletext data receiver.