发明名称 |
Apparatus for automatic instruction parity error recovery. |
摘要 |
<p>The method for recovery from an instruction parity error consists in forcing a No-Operation instruction onto the processor's instruction bus (11) in place of the faulty instruction when a parity error is detected during instruction fetch, storing the address of the instruction having the parity error, and forcing the next instruction to the processor (2) from a parity error recovery routine. The parity error recovery routine logs the error, restores the instruction from local disk storage or from a remote host system in communication (via 6) with the processor (2) and forces the processor (2) to resume fetching instructions at the address where the error occurred. </p> |
申请公布号 |
EP0120186(A2) |
申请公布日期 |
1984.10.03 |
申请号 |
EP19840100226 |
申请日期 |
1984.01.11 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DAY, MICHAEL NORMAN;MILLER, CLAUDE DANNY |
分类号 |
G06F11/10;G06F11/00;G06F11/14;G06F12/16;(IPC1-7):06F11/00 |
主分类号 |
G06F11/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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